At this week’s IEEE IEDM 2018 conference, imec presents the first demonstration of 3D stacked FinFETs on 300mm wafers using a sequential integration approach with a 45nm fin pitch and 110nm poly pitch technology.   The top layer consists of junction-less devices fabricated at a temperature below 525°C in a silicon layer transferred by wafer-to-wafer bonding. The excellent performance of the resulting stack demonstrates how the 3D sequential approach can be deployed to obtain an aggressive device...